全部文献期刊学位论文会议报纸专利标准年鉴图书|学者科研项目
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作者:Hyun-Sook Chung , Yilbyung Lee
来源:[J].Computer Standards & Interfaces(IF 0.978), 2004, Vol.26 (2), pp.113-130Elsevier
摘要:... Our standard format is called Motion Capture Markup Language (MCML). It is a markup language based on eXtensible Markup Language (XML). The purpose of MCML is not only to facilitate the conversion or integration of different formats, but also to allow for greater reusability ...
作者:Kirti Gupta , Neeta Pandey , Maneesha Gupta
来源:[J].Microelectronics Journal(IF 0.912), 2013, Vol.44 (6), pp.561-567Elsevier
摘要:Abstract(#br)A new low-voltage MOS current mode logic (MCML) topology for an exclusive-OR (XOR) gate using triple-tail cell concept is proposed. The design of the proposed MCML XOR gate is carried out through analytical modeling of its static parameters. The delay is expresse...
作者:Manisha Guduri , Rishab Mehra , Pragya Srivastava ...
来源:[J].Microsystem Technologies(IF 0.827), 2017, Vol.23 (9), pp.4045-4056Springer
摘要:... MOS current mode logic (MCML) style has emerged as a promising logic style that offers high speed of operation at the expense of acceptable power dissipation. This paper proposes a MCML full adder which employs a load controller circuit. It compares MCML full adder with hyb...
作者:SARA NESHANI , SEYED JAVAD AZHARI
来源:[J].Journal of Circuits, Systems, and Computers(IF 0.238), 2013, Vol.22 (08)World Scientific Publishing
摘要:... To noticeably save the power and area and greatly increase the speed, compactness and accuracy its complete structure is elaborately implemented in MOS Current Mode Logic (MCML) topology. The proposed ADC does not use a front-end track and hold (T/H) block either. Furthe...
作者:Alexander Shapiro , Eby G. Friedman
来源:[J].Journal of Low Power Electronics and Applications, 2014, Vol.4 (2), pp.138-152DOAJ
摘要:... The combination of NTC technology with MOS current mode logic (MCML) is examined in this work. By combining MCML with NTC, the constant power consumption of MCML is reduced to leakage power levels that can be tolerated in certain modern applications. Additionally, the speed o...
作者:Lihong Wang , Steven L. Jacques , Liqiong Zheng
来源:[J].Computer Methods and Programs in Biomedicine(IF 1.555), 1995, Vol.47 (2), pp.131-146Elsevier
摘要:Abstract(#br)A Monte Carlo model of steady-state light transport in multi-layered tissues (MCML) has been coded in ANSI Standard C; therefore, the program can be used on various computers. Dynamic data allocation is used for MCML, hence the number of tissue layers and grid elemen...
作者:Ruiping Cao , Jianping Hu
来源:[J].Journal of Electrical and Computer Engineering, 2014, Vol.2014DOAJ
摘要:In high-speed applications, MOS current mode logic (MCML) is a good alternative. Scaling down supply voltage of the MCML circuits can achieve low power-delay product (PDP). However, the current almost all MCML circuits are realized with dual-rail scheme, where the NMOS configurat...
作者:Hossam Hassan , Sameh Ibrahim , HyungWon Kim
来源:[J].Microelectronics Journal(IF 0.912), 2018, Vol.74, pp.127-140Elsevier
摘要:Abstract(#br)The sub-threshold circuit design is regarded as a promising technique to provide considerable power reduction for ultra-low-power applications under tight energy constraints. This paper presents Power-Gating Sub-Threshold Source-Coupled Logic (PG-STSCL), which employ...
作者:J. B. Kim , Y. S. Lee
来源:[J].International Journal of Electronics(IF 0.509), 2007, Vol.94 (10), pp.905-913Taylor & Francis
摘要:This paper proposes an 8 × 8 bit parallel multiplier using MOS current mode logic (MCML) for low power consumption. The 8 × 8 bit multiplier is designed with the proposed MCML full adders and the conventional full adders. The proposed multiplier is achieved to reduce the pow...
作者:Ruiping Cao , Jianping Hu , Mohamad Sawan
来源:[J].Journal of Electrical and Computer Engineering, 2014, Vol.2014Hindawi
摘要:In high-speed applications, MOS current mode logic (MCML) is a good alternative. Scaling down supply voltage of the MCML circuits can achieve low power-delay product (PDP). However, the current almost all MCML circuits are realized with dual-rail scheme, where the NMOS configurat...

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